MSc Gürleyük

1. A 16 MHz CMOS RC Frequency Reference With ±90 ppm Inaccuracy From −45 °C to 85 °C
   Gürleyük, Çağrı; Pan, Sining; Makinwa, Kofi A. A.;
   IEEE Journal of Solid-State Circuits,
   Volume 57, Issue 8, pp. 2429-2437, 2022. DOI: 10.1109/JSSC.2022.3142662

2. A 200-μW Interface for High-Resolution Eddy-Current Displacement Sensors
   M. Pimenta; Ç. Gürleyük; P. Walsh; D. O’Keeffe; M. Babaie; K. A. A. Makinwa;
   IEEE Journal of Solid-State Circuits,
   Volume 56, pp. 1036-1045, January 2021. DOI: 10.1109/JSSC.2020.3044027
   
   Abstract: ...

   This article presents a low-power eddy-current sensor interface for touch applications. It is based on a bang-bang digital phase-locked loop (DPLL) that converts the displacement of a metal target into digital information. The PLL consists of a digitally controlled oscillator (DCO) built around a sensing coil and a capacitive DAC, a comparator-based bang-bang phase/frequency detector (PFD), and a digital loop filter (DLF). The PLL locks the DCO to a reference frequency, making its digital input a direct representation of the sensing coil inductance. To compensate for the coil inductance tolerances, the DCO’s center frequency can be trimmed by a second capacitive DAC. This approach obviates the need for a reference coil. When combined with a 5-mm-diameter sensing coil located 500 μm from a metal target, the interface achieves a displacement resolution of 6.7 nm (rms) in a 3-kHz bandwidth. It consumes 200 μW from a 1.8-V power supply, which represents the best-reported tradeoff between power consumption, bandwidth, and resolution.

3. A 200-μW Interface for High-Resolution Eddy-Current Displacement Sensors
   M. Pimenta; Ç. Gürleyük; P. Walsh; D. O’Keeffe; M. Babaie; K. A. A. Makinwa;
   IEEE Journal of Solid-State Circuits,
   Volume 56, Issue 4, pp. 1036-1045, January 2021. DOI: 10.1109/JSSC.2020.3044027
   
   Abstract: ...

   This article presents a low-power eddy-current sensor interface for touch applications. It is based on a bang-bang digital phase-locked loop (DPLL) that converts the displacement of a metal target into digital information. The PLL consists of a digitally controlled oscillator (DCO) built around a sensing coil and a capacitive DAC, a comparator-based bang-bang phase/frequency detector (PFD), and a digital loop filter (DLF). The PLL locks the DCO to a reference frequency, making its digital input a direct representation of the sensing coil inductance. To compensate for the coil inductance tolerances, the DCO’s center frequency can be trimmed by a second capacitive DAC. This approach obviates the need for a reference coil. When combined with a 5-mm-diameter sensing coil located 500 μm from a metal target, the interface achieves a displacement resolution of 6.7 nm (rms) in a 3-kHz bandwidth. It consumes 200 μW from a 1.8-V power supply, which represents the best-reported tradeoff between power consumption, bandwidth, and resolution.

4. A 0.14mm2 16MHz CMOS RC Frequency Reference with a 1-Point Trimmed Inaccuracy of ±400ppm from -45°C to 85°C
   H. Jiang; S. Pan; Ç. Gürleyük; K. A. A. Makinwa;
   In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
   February 2021. DOI: 10.1109/ISSCC42613.2021.9365795

5. A 0.14mm2 16MHz CMOS RC Frequency Reference with a 1-Point Trimmed Inaccuracy of ±400ppm from -45°C to 85°C
   H. Jiang; S. Pan; Ç. Gürleyük; K. A. A. Makinwa;
   In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
   pp. 436-438, February 2021. DOI: 10.1109/ISSCC42613.2021.9365795

6. A 16MHz CMOS RC Frequency Reference with±400ppm Inaccuracy from− 45° C to 85° C After Digital Linear Temperature Compensation
   Ç. Gürleyük; S. Pan; K. A. A Makinwa;
   In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
   pp. 64-66, 2 2020. DOI: 10.1109/ISSCC19947.2020.9063029

7. A 200μW Eddy Current Displacement Sensor with 6.7nmRMS Resolution
   M. Pimenta; Ç. Gürleyük; P. Walsh; D. O'Keeffe; M. Babaie; K. Makinwa;
   In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
   June 2020. DOI: 10.1109/VLSICircuits18222.2020.9162849

8. A 200μW Eddy Current Displacement Sensor with 6.7nmRMS Resolution
   M. Pimenta; Ç. Gürleyük; P. Walsh; D. O'Keeffe; M. Babaie; K. Makinwa;
   In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
   pp. 1-2, June 2020. DOI: 10.1109/VLSICircuits18222.2020.9162849

9. A 16MHz CMOS RC Frequency Reference with±400ppm Inaccuracy from− 45° C to 85° C After Digital Linear Temperature Compensation
   Ç. Gürleyük; S. Pan; K. A. A Makinwa;
   In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
   pp. 64-66, 2 2020. DOI: 10.1109/ISSCC19947.2020.9063029

10. High performance inductive sensing all digital phase locked loop
    P. M Walsh; D. MacSweeney; D. O'keeffe; K. Makinwa; M. Pimenta; D. R Seguine; Ç. Gürleyük;
    Patent, 16721222, November 2020.

11. A 0.12mm2 Wien-Bridge Temperature Sensor with 0.1°C (3σ) Inaccuracy from -40°C to 180°C
    S. Pan; Ç. Gürleyük; M.F. Pimenta; K.A.A Makinwa;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    2 2019. DOI: 10.1109/ISSCC.2019.8662457

12. A 0.12mm2 Wien-Bridge Temperature Sensor with 0.1°C (3σ) Inaccuracy from -40°C to 180°C
    S. Pan; Ç. Gürleyük; M.F. Pimenta; K.A.A Makinwa;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 184-186, 2 2019. DOI: 10.1109/ISSCC.2019.8662457

13. A CMOS Dual-RC Frequency Reference with ±200-ppm Inaccuracy from −45 °C to 85 °C
    Ç. Gürleyük; L. Pedalà; S. Pan; F. Sebastiano; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 53, Issue 12, pp. 3386-3395, 12 2018. DOI: 10.1109/JSSC.2018.2869083
    
    Abstract: ...

    This paper presents a 7-MHz CMOS RC frequency reference. It consists of a frequency-locked loop in which the output frequency of a digitally controlled oscillator (DCO) is locked to the combined phase shifts of two independent RC (Wien bridge) filters, each employing resistors with complementary temperature coefficients. The filters are driven by the DCO’s output frequency and the resulting phase shifts are digitized by high-resolution phase-to-digital converters. Their outputs are then combined in the digital domain to realize a temperature-independent frequency error signal. This digitally assisted temperature compensation scheme achieves an inaccuracy of ±200 ppm from –45 °C to 85 °C after a two-point trim. The frequency reference draws 430 μA from a 1.8-V supply, while achieving a supply sensitivity of 0.18%/V and a 330-ppb Allan deviation floor in 3 s of measurement time.

14. A CMOS Dual-RC Frequency Reference with ±200-ppm Inaccuracy from −45 °C to 85 °C
    Ç. Gürleyük; L. Pedalà; S. Pan; F. Sebastiano; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 53, Issue 12, pp. 3386-3395, 12 2018. DOI: 10.1109/JSSC.2018.2869083
    
    Abstract: ...

    This paper presents a 7-MHz CMOS RC frequency reference. It consists of a frequency-locked loop in which the output frequency of a digitally controlled oscillator (DCO) is locked to the combined phase shifts of two independent RC (Wien bridge) filters, each employing resistors with complementary temperature coefficients. The filters are driven by the DCO’s output frequency and the resulting phase shifts are digitized by high-resolution phase-to-digital converters. Their outputs are then combined in the digital domain to realize a temperature-independent frequency error signal. This digitally assisted temperature compensation scheme achieves an inaccuracy of ±200 ppm from –45 °C to 85 °C after a two-point trim. The frequency reference draws 430 μA from a 1.8-V supply, while achieving a supply sensitivity of 0.18%/V and a 330-ppb Allan deviation floor in 3 s of measurement time.

15. A CMOS Dual-RC frequency reference with±250ppm inaccuracy from− 45° C to 85° C
    C. Gürleyük; L. Pedala; F. Sebastiano; K.A.A. Makinwa;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 54-56, 2 2018. DOI: 10.1109/ISSCC.2018.8310180

16. A CMOS Dual-RC frequency reference with±250ppm inaccuracy from− 45° C to 85° C
    C. Gürleyük; L. Pedala; F. Sebastiano; K.A.A. Makinwa;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 54-56, 2 2018. DOI: 10.1109/ISSCC.2018.8310180

17. A Frequency-Locked Loop Based on an Oxide Electrothermal Filter in Standard CMOS
    L. Pedala; C. Gurleyuk; S. Pan; F. Sebastiano; K. Makinwa;
    In European Solid-State Circuits Conference (ESSCIRC),
    Leuven, Belgium, 9 2017. DOI: 10.1109/esscirc.2017.8094512

18. A Frequency-Locked Loop Based on an Oxide Electrothermal Filter in Standard CMOS
    L. Pedala; C. Gurleyuk; S. Pan; F. Sebastiano; K. Makinwa;
    In European Solid-State Circuits Conference (ESSCIRC),
    Leuven, Belgium, pp. 7-10, 9 2017. DOI: 10.1109/esscirc.2017.8094512

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